docs:thesis:start
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docs:thesis:start [2026/01/29 14:41] marek.idzik [Bachelor thesis] |
docs:thesis:start [2026/01/29 14:44] (current) marek.idzik [Bachelor thesis] |
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| * {{:docs:thesis:moron_firlej_inz.pdf| Jakub Moron, Miroslaw Firlej, Projektowanie interfejsu USB w oparciu o programowalne uklady logiczne (Field Programmable Gate Array), 2008}} | * {{:docs:thesis:moron_firlej_inz.pdf| Jakub Moron, Miroslaw Firlej, Projektowanie interfejsu USB w oparciu o programowalne uklady logiczne (Field Programmable Gate Array), 2008}} | ||
| * {{:docs:thesis:tolarczyk_inz.pdf| Wiktoria Tolarczyk, Projekt przetwornika cyfrowo-analogowego w submikronowej technologii CMOS, 2023}} | * {{:docs:thesis:tolarczyk_inz.pdf| Wiktoria Tolarczyk, Projekt przetwornika cyfrowo-analogowego w submikronowej technologii CMOS, 2023}} | ||
| + | * {{:docs:thesis:uljasz_inz.pdf| Maciej Uljasz, Qualification tests of FLAXE - a dedicated front-end ASIC for the readout of semiconductor detectors, 2025}} | ||
/services/www/http/wiki/data/pages/docs/thesis/start.txt · Last modified: 2026/01/29 14:44 by marek.idzik
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