soft:cadence:monte_carlo:start
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soft:cadence:monte_carlo:start [2012/07/18 22:44] 127.0.0.1 external edit |
soft:cadence:monte_carlo:start [2019/03/08 14:08] (current) |
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| ** Remark ** All simulations type (dc, ac, etc) and outputs are set on **Data View** in **Tests** branch. | ** Remark ** All simulations type (dc, ac, etc) and outputs are set on **Data View** in **Tests** branch. | ||
| + | ===== Phase Margin, GBW and open loop gain ===== | ||
| + | Due to lack of corelations between instances on test bench, it is not possible to check above parameters in the standard AC simulations on replica circuits. \\ | ||
| + | The solution is to run MC on //stb// analysis and use following expressions to obtain histograms of DC open loop gain, phase margin and gain-bandwidth product: \\ | ||
| + | - DC Open loop gain: <code>dB20(value(getData("loopGain" ?result "stb") 0))</code> | ||
| + | - Phase Margin: <code>getData("/phaseMargin" ?result "stb_margin")</code> | ||
| + | - GainBandWidth: <code>getData("/phaseMarginFreq" ?result "stb_margin")</code> | ||
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